? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 ? low-cost, 3-channel, sd video fi lter drivers with exte rnal delay control march 2007 fms6243 rev. 1.0.0 fms6243 low-cost, 3-channel, sd video filter drivers with external delay control features three fourth-order 8mhz (sd) filters external delay control transparent input clamping dual-video load drive (2vpp, 75 ) ac- or dc-coupled inputs ac- or dc-coupled outputs dc-coupled outputs eliminate ac-coupling capacitors 5v only lead-free package: tssop-14 applications cable set-top boxes satellite set-top boxes dvd players hdtv personal video recorders (pvr) video on demand (vod) description the fms6243 low-cost video filter (lcvf) is intended to replace passive lc filters and drivers with a low-cost integrated device. three fourth-order filters provide improved image quality compared to typical second- or third-order passive solutions. the fms6243 can be directly driven by a dc-coupled dac output or an ac-coupled signal. internal diode clamps and bias circuitry can be used if ac-coupled inputs are required (see the applications section for details). delay for each channel can be independently controlled with an external capacitor. the outputs can drive ac- or dc-coupled single (150 ) or dual (75 ) loads. dc coupling the outputs removes the need for output coupling capacitors. the input dc levels are offset approximately +280mv at the output (see the applications section for details). ordering information figure 1. functional block diagram part number package pb- free operating temperature range packing method fms6243mtc14 14-lead tssop, jedec mo-1 53, 4.4mm wide yes -40c to 85c tube FMS6243MTC14X 14-lead tssop, jedec mo-153, 4.4mm wide yes -40c to 85c tape and reel in1 in2 in3 out1 out2 out3 8mhz, 4th-order transparent clamp transparent clamp transparent clamp del1 del2 del3 2x 2x 2x
fms6243 ? low-cost, 3-channel, sd video fi lter drivers with exte rnal delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 2 pin assignments figure 2. pin configuration pin definitions pin # name type description 1 dcap1 input external group delay and chro ma/luma delay adjustment for channel 1 2 gnd input must be tied to ground, do not float 3 in1 input video input channel 1 4 in2 input video input channel 2 5 in3 input video input channel 3 6 gnd input must be tied to ground, do not float 7 dcap2 input external group delay and chro ma/luma delay adjustment for channel 2 8 gnd input must be tied to ground, do not float 9 dcap3 input external group delay and chro ma/luma delay adjustment for channel 3 10 out3 output filtered output for channel 3 11 out2 output filtered output for channel 2 12 out1 output filtered output for channel 1 13 gnd input must be tied to ground, do not float 14 v cc input +5v supply, do not float dcap1 gnd in1 in2 in3 gnd dcap2 v cc gnd out1 out2 out3 dcap3 gnd 2 1 3 4 5 6 7 13 14 12 11 10 9 8
fms6243 ? low-cost, 3-channel, sd video fi lter drivers with exte rnal delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 3 absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. in addi- tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. recommended oper ating conditions the recommended operating conditions table defines the conditions for actual dev ice operation. recommended operating conditions are specified to ensure optimal perfor mance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. electrostatic discharge conditions reliability information symbol parameter min. max. units v cc dc supply voltage -0.3 6.0 v v i/o analog and digital i/o -0.3 v cc +0.3 v i out output current any one channel, do not exceed 50 ma symbols parameter min. typ. max. units t a operating temperature range -40 85 c v cc v cc range 4.75 5.00 5.25 v symbols parameter value units hbm human body model 8 kv cdm charged device model 2 kv symbol parameter min. typ. max. units t j junction temperature 150 c t stg storage temperature range -65 150 c t l reflow temperature (soldering) 260 c ja thermal resistance, still air jedec standard multi-layer test boards, 100 c/w
fms6243 ? low-cost, 3-channe l, sd video filter drivers with external delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 4 dc specifications t a = 25c, v cc = 5.0v, r s = 37.5 ; all inputs are ac coupled with 0.1 f; all outputs are ac coupled with 220 f into 150 loads; unless otherwise noted. note: 1. 100% tested at 25c. ac electrical specifications t a = 25c, v in = 1v pp , v cc = 5.0v, r s = 37.5 ; all inputs are ac coupled with 0.1f; all outputs are ac coupled with 220f into 150 loads; unless otherwise noted. note: 1. 100% tested at 25c. symbol parameter conditions min. typ. max. units i cc supply current (1) no load 24 34 ma v in video input voltage range referenced to gnd if dc-coupled 1.4 vpp psrr power supply rejection ratio (all channels) dc 48 db symbol parameter conditions min. typ. max. units av channel gain (1) all channels 5.6 6.0 6.6 db f 1db -1db bandwidth (1) all channels 5.5 6.5 mhz f c -3db bandwidth all channels 8.0 mhz f sb attenuation (stopband reject) all channels at f = 27mhz 44 db dg differential gain all channels 0.3 % dp differential phase all channels 0.6 thd output distortion (all channels) v out = 1.8v pp , 1mhz 0.4 % x talk crosstalk (channel-to-channel) f = 1mhz -70 db snr signal-to-noise ratio all channels, chroma weighting; 5 mhz low pass 75 db
fms6243 ? low-cost, 3-channe l, sd video filter drivers with external delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 5 application information the fms6243 low-cost video filter (lcvf) provides 6db gain from input to output. in addition, the input is slightly offset to optimize the output driver performance. the offset is held to the minimum required value to decrease the standing dc current into the load. typical voltage levels are shown in the diagram below: figure 3. typical voltage levels the fms6243 provides an internal diode clamp to sup- port ac-coupled input signals. if the input signal does not go below ground, the input clamp does not operate. this allows dac outputs to directly drive the fms6243 without an ac coupling capacitor. when the input is ac-coupled, the diode clamp sets the sync tip (or lowest voltage) just below ground. the worst-case sync tip compression due to the clamp can not exceed 7mv. the input level set by the clamp combined with the internal dc offset keeps the output within its acceptable range. for symmetric signals like chroma, u, v, pb, and pr, the average dc bias is fairly cons tant and the inputs can be ac-coupled with the addition of a pull-up resistor to set the dc input voltage. dac outputs can also drive these signals without the ac-coupling capacitor. a conceptual illustration of the input cl amp circuit is shown below: figure 4. input clamp circuit i/o configurations for dc-coupled dac drive with dc-coupled outputs, use this configuration: figure 5. dc-coupled inputs and outputs alternatively, if the dac?s average dc output level causes the signal to exceed the range of 0v to 1.4v, it can be ac-coupled as follows: figure 6. ac-coupled inputs, dc-coupled outputs when driven by an unknown external source or a scart switch with its own clamping circuitry, the inputs should be ac-coupled like this: figure 7. scart with dc-coupled outputs the same method can be used for biased signals with the addition of a pull-up resistor to make sure the clamp never operates. the internal pull-down resistance is 800k 20% so the external resistance should be 7.5m to set the dc level to 500mv. figure 8. biased scart with dc-coupled outputs
fms6243 ? low-cost, 3-channe l, sd video filter drivers with external delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 6 the same circuits can be used with ac-coupled outputs if desired. here is the dc-c oupled input with an ac-cou- pled output. figure 9. dc-coupled in puts, ac-coupled outputs figure 10. ac-coupled inputs and outputs figure 11. biased ac-coupled inputs with ac-coupled outputs note: the video tilt or line time distortion is dominated by the ac-coupling capacitor. the value may need to be increased beyond 220f to obtain satisfactory operation in some applications. power dissipation the output drive configurat ion must be considered when calculating overall power dissipation. care must be taken not to exceed the maximum die junction temperature. the following example can be used to calculate power dissipation and internal temperature rise: t j = t a + p d ? ja where: p d = p ch1 + p ch2 + p ch3 and p chx = v s ? i ch - (v o 2 /r l ) where: v o = 2v in + 0.280v i ch = (i cc / 3) + (v o /r l ) v in = rms value of input signal i cc = 24ma v s = 5v r l = channel load resistance board layout can also affe ct thermal characteristics. refer to the layout considerations section for more information. the fms6243 is specified to operate with output cur- rents typically less than 50ma, more than sufficient for a dual (75 ) video load. internal amplifiers are current lim- ited to a maximum of 100ma and should withstand brief- duration, short-circuit conditions; however, this capability is not guaranteed. group delay adjustment the fms6243 has the ability to independently adjust each channel for sin x/x group delay and chroma/luma delay. this is accomplished by placing a capacitor from the device delay adjust pin to ground. the group delay can be adjusted from the nominal of +10ns to -80ns. this means that, under a nominal situation, a video system may have an overall group delay measurement of +50ns. if the system specif ication is +40ns, the fms6243 could be used to decrease this group delay to fall well within specification with a guard band to allow for system variation. adding a 50pf capacitor to the desired channel dcap pin (see figure 15) generates a -20ns delay through the fms6243, which, when summ ed with the +50ns of the system, gives a new system overall group delay of +30ns. it now meets the syst em specification with a +10ns guard band for system group delay variation. figure 12 shows the effect on group delay by adding capacitance to the fms6243 dcap pins. the correct capacitor can be chosen by determining the format of the video system (ntsc 3.58 or pal 4.43), then choosing the desired group delay to sum with overall system delay. the desired delay and format line intersection is the delay capacitor needed for the dcap pins. figure 12. group delay vs. delay cap. value dvd or stb soc dac output 75 lcvf clamp inactive 0v - 1.4v lcvf clamp active 0.1 external video source must be ac coupled 0v - 1.4v 220 75 75 lcvf bias input 0.1 external video source must be ac coupled 500mv +/-350mv 75 7.5m 75 -100 -80 -60 -40 -20 0 20 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 frequency (mhz) group delay (ns) 10pf 20pf 30pf 40pf 50pf 60pf 70pf 80pf 400khz ref 3.58mhz 4.43mhz
fms6243 ? low-cost, 3-channe l, sd video filter drivers with external delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 7 signal peaking adjustment the peaking of a video input signal can be adjusted by placing a peaking capacitor across the series-75ohm resistor on the output of the fms6243. where the input video signal to the fms6243 has a soft roll-off, meaning the input video signal is attenuated at 4mhz by -0.5db, the chroma/luma gain is approximately -5% and fails a system specification of +- 2.5%. this attenuation can be adjusted by adding a 150pf capacitor across the series- 75ohm resistor on the output (see figure 15). this brings the attenuation at 4.0mhz to approximately 0db, giving a chroma/luma gain of 0%. figure 13 shows the peaking effect of adding a peaking capacitor across the series- 75ohm resistor. the graph shows a 10pf delay capacitor with a 10pf, 50pf, and 100pf peaking capacitor. figure 13. frequency response delay capacitor vs. peaking capacitor group delay and peaking adjustment simultaneously if both a group delay adjustment and a peaking adjust- ment need to be incorporated into the system design, the following methodology should be followed. address the group delay adjustment first, then the peaking adjus- ment, because the group delay adjustment causes a video signal attenuation at 4mhz. figure 14. frequency response vs. delay cap. value figure 15. schematic 5.90 5.95 6.00 6.05 6.10 6.15 6.20 6.25 6.30 6.35 6.40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 frequency (mhz) gain (db) 10pf10pf 10pf50pf 10pf100pf 5.90 5.95 6.00 6.05 6.10 6.15 6.20 6.25 6.30 6.35 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 frequency (mhz) gain (db) 10pf 40pf 80pf 400khz 3.58mhz 4.43mhz peaking delay cap delay cap in1 220f in2 220f 75 peaking out1 in3 75 220f peaking 75 3 4 5 14 13 10 11 12 9 8 1 2 6 7 in1 in2 in3 vcc gnd4 out3 out2 out1 dcap3 gnd3 dcap1 gnd1 gnd2 dcap2 + out2 + delay cap + v cc out3
fms6243 ? low-cost, 3-channe l, sd video filter drivers with external delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 8 layout considerations it is critical that the delay capacitor pins (1, 7, and 9) have the delay capacitor placed as close to the device pin as possible. the ground connection should be as short as possible, ideally a direct connect to the adjacent ground pin. these layout cons iderations create the best environment for the device and reduce noise. general layout and supply bypassing play a major role in high-frequency performance and thermal characteristics. fairchild offers a demonstration board to guide layout and aid device evaluation. the demo board is a four- layer board with full power and ground planes. following this layout configuration provides optimum performance and thermal characteristics for the device. for the best results, follow the steps and recommended routing rules listed below. recommended routing / layout rules do not run analog and digital signals in parallel. use separate analog and digital power planes to supply power. traces should run on top of the ground plane at all times. no trace should run over ground / power splits. avoid routing at 90-degree angles. minimize clock and video data trace length differ- ences. include 10 f and 0.1 f ceramic power supply bypass capacitors. place the 0.1 f capacitor within 0.1 inches of the device power pin. place the 10 f capacitor within 0.75 inches of the device power pin. for multi-layer boards, use a large ground plane to help dissipate heat. for two-layer boards, use a ground plane that extends beyond the device body at least 0.5 inches on all sides. include a metal paddle under the device on the top layer. minimize all trace lengths to reduce series inductance. thermal considerations since the interior of most systems, such as set-top boxes, tvs, and dvd players, are at +70c; consider- ation must be given to providing an adequate heat sink for the device package for maximum heat dissipation. when designing a system boa rd, determine how much power each device dissipates. ensure that devices of high power are not placed in the same location, such as directly above (top plane) or below (bottom plane), each other on the pcb. pcb thermal layout considerations understand the system power requirements and environmental conditions. maximize thermal performance of the pcb. consider using 70 m of copper for high-power designs. make the pcb as thin as possible by reducing fr4 thickness. use vias in the power pad to tie adjacent layers together. remember that baseline tem perature is a function of board area, not copper thickness. modeling techniques provide first-order approximation.
fms6243 ? low-cost, 3-channe l, sd video filter drivers with external delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 9 mechanical dimensions dimensions are in millimet ers unless otherwise noted. figure 16. 14-lead, thin-shrink small outline package (tssop)
fms6243 ? low-cost, 3- channel, sd video filter driver s with external delay control ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fms6243 rev. 1.0.0 10 rev. i24 trademarks the following are registered and unregistered trademarks fairchild se miconductor owns or is authoriz ed to use and is not intend ed to be an exhaustive list of all such trademarks. disclaimer fairchild semiconductor reserves the right to make ch anges without further no tice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any product or circuit d escribed herein; neither does it convey any license under its patent rights, nor the rights of others . these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif ically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or sy stems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms acex ? across the board. around the world.? activearray? bottomless? build it now? coolfet? crossvolt ? ctl? current transfer logic? dome? e 2 cmos? ecospark ? ensigna? fact quiet series? fact ? fast ? fastr? fps? frfet ? globaloptoisolator? gto? hisec? i-lo ? implieddisconnect? intellimax? isoplanar? microcoupler? micropak? microwire? msx? msxpro? ocx? ocxpro? optologic ? optoplanar ? pacman? pop? power220 ? power247 ? poweredge? powersaver? powertrench ? programmable active droop? qfet ? qs? qt optoelectronics? quiet series? rapidconfigure? rapidconnect? scalarpump? smart start? spm ? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 syncfet? tcm? the power franchise ? ? tinyboost? tinybuck? tinylogic ? tinyopto? tinypower? tinywire? trutranslation? serdes? uhc ? unifet? vcx? wire? datasheet identification product status definition advance information formative or in design this datasheet contains the design specifications fo r product development. specifications may change in any manner without notice. preliminary first production this datasheet contains preliminary data; supplementary data will be pub- lished at a later date. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. no identification needed full production this datasheet contains final specificat ions. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. obsolete not in production this datasheet contains specificati ons on a product that has been discontin- ued by fairchild semiconductor. the dat asheet is printed for reference infor- mation only.
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